US Patent 7126345 Integrated circuit capable of reduced error calibration

A method according to one embodiment may include generating, by an integrated circuit including calibration controller circuitry including a comparator, at least one reference voltage. The method of this embodiment may also include calibrating, by the calibration controller circuitry, at least one reference current signal by comparing, by the comparator, a signal proportional to the reference current signal and at least one reference voltage. The method of this embodiment may further include calibrating, by the calibration controller circuitry, at least one resistance value control signal, by comparing, by the comparator, a signal proportional to at least one resistance value control signal and at least one reference voltage. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment