Patent attributes
Good device PASS/FAIL determination is realized by measuring timings of both signals, i.e., a cross point of differential clock signals CLK and a data signal DATA output from a DUT, and obtaining a relative phase difference between both signals. A semiconductor test apparatus comprises differential signal timing measurement means for outputting cross point information Tcross obtained by measuring a timing of a cross point of one of differential signals output from the device under test, non-differential signal timing measurement means for outputting data change point information Tdata obtained by measuring a timing of transition of a logic of the other non-differential signal output from the DUT, phase difference calculation means for outputting a phase difference ΔT obtained by calculating a relative phase difference between the cross point information Tcross and the data change point information Tdata obtained by simultaneously measuring both of the output signals, and PASS/FAIL determination means for determining PASS/FAIL of a relative positional relation of the DUT based on a predetermined threshold value for executing PASS/FAIL determination upon reception of the phase difference ΔT.
