Patent attributes
A semiconductor memory device includes memory cell arrays, word lines, sub-sense lines, main sense line, row decoders, column decoders, first switch elements, read circuit, and write circuit. Each memory cell array has a matrix of memory cells including magnetoresistive elements. Each magnetoresistive element has first and second magnetic layers and a first insulating layer formed between the first and second magnetic layers. The word line is connected to the first magnetic layers on each row. The sub-sense line is connected to the second magnetic layers on each column. The main sense line is connected to each sub-sense line. The row decoder and column decoder select a word line and sub-sense line. The first switch element connects the sub-sense line selected by the column decoder to the main sense line. The read circuit reads out data from a memory cell. The write circuit writes data in a memory cell.