US Patent 7126867 Semiconductor memory device for low power system

A semiconductor memory device for outputting or storing a data in response to inputted address and command includes a first cell array for outputting the data to one of a bit line and a bit line bar; a first reference cell block for outputting a reference signal to the other of the bit line and the bit line bar; a sense amplifying block for sensing and amplifying a voltage difference between the bit line and the bit line bar; a first connection block for connecting or disconnecting the first cell array and the first reference cell block to the sense amplifying block; and a floating control block for floating the bit line and the bit line bar if a precharge command signal is activated.