US Patent 7133647 Chiprate correction in digital transceivers

A transceiver for a code division multiple access communication system comprises a receiver to receive coded information signals and a transmitter to transmit coded information signals. A local oscillator provides a time and frequency reference for the receiver and the transmitter. A timing controller provides timing signals for the receiver and the transmitter. A signal processor decodes received signals to determine a common error associated with the timing controller. A timing correction circuit smoothly adjusts the timing of the coded information signals transmitted by the transmitter responsive to the timing error to reduce the timing error over a desired time interval.