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US Patent 7138068 Printed circuit patterned embedded capacitance layer

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Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7138068
Date of Patent
November 21, 2006
Patent Application Number
11084938
Date Filed
March 21, 2005
Patent Primary Examiner
‌
Nadine Norton
Patent abstract

A method is disclosed for fabricating a patterned embedded capacitance layer. The method includes fabricating (1305, 1310) a ceramic oxide layer (510) overlying a conductive metal layer (515) overlying a printed circuit substrate (505), perforating (1320) the ceramic oxide layer within a region (705), and removing (1325) the ceramic oxide layer and the conductive metal layer in the region by chemical etching of the conductive metal layer. The ceramic oxide layer may be less than 1 micron thick.

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