US Patent 7139854 Pipelining access to serialization tokens on a bus

Apparatus and methods are disclosed herein that provide reduced bus transaction latency on a bus architecture that includes at least one master coupled to a plurality of slaves. As disclosed herein, a device (e.g., a slave) may include bus logic and host logic coupled to the bus logic. The bus logic may obtain a serialization token permitting the host logic to complete a transaction received by the bus logic via the bus. Further, the bus logic may keep the serialization token to complete at least one other transaction.