US Patent 7141474 Fabrication method of a nonvolatile semiconductor memory

A method of fabricating a nonvolatile semiconductor memory including the steps of: sequentially forming a gate insulating layer and a first conductive layer of a floating gate on a semiconductor substrate; depositing an inter-gate insulating layer; forming an opening in a part of the inter-gate insulating layer; depositing a control gate electrode on the inter-gate insulating layer and an exposed portion of the first conductive layer by the opening; and forming the gate electrodes of the memory cell transistors and the gate electrodes of the select transistors by utilizing the etching processes of the control gate electrode, the inter-gate insulating layer and the first conductive layer, wherein the select transistors include at least a part of the exposed portion of the first conductive layer.