US Patent 7142011 Programmable logic device with routing channels
Patent 7142011 was granted and assigned to Altera on November, 2006 by the United States Patent and Trademark Office.
All edits
A programmable logic device (PLD) is provided that includes at least one dedicated output routing channel configured to facilitate the processing of output signals generated by multiple function-specific blocks (FSBs). The output routing channel includes a plurality of functional units that may be programmably selectively chained, wherein each functional unit contains an operational block and output selection logic that are configured to programmably selectively implement any of a variety of operations (e.g., bitwise, logical, arithmetic, etc.) that may be performed on the outputs of single FSBs and/or several FSBs. In addition to the output routing channel, the PLD may also contain at least one input routing channel that is configured to facilitate the routing, registering, and/or selection of FSB input signals. In some cases, the FSB input routing channel may also include circuitry for performing elementary processing operations.
US Patent 07142011 Programmable logic device with routing channels US Patent 7142011 Programmable logic device with routing channels
US Patent 07142011 Programmable logic device with routing channels
Find more entities like US Patent 7142011 Programmable logic device with routing channels
