Patent attributes
According to one embodiment, a circuit configured to form an output video stream includes a resolution modification circuit configured to receive a plurality of video frames from a frame buffer, and configured to modify resolution of the plurality of video frames, when the desired resolution for the output video stream is different than a resolution of the input video stream, the plurality of frames of data derived from an input video stream, a frame reducing circuit coupled to the resolution reducing circuit configured to reduce a number of video frames in the plurality of video frames from the resolution reducing circuit, when a desired frame rate for the output video stream is different than a frame rate of the input video stream, a depth reduction circuit coupled to the frame reducing circuit configured to reduce bit depth of the plurality of video frames from the frame reducing circuit, when a desired bit depth for the output video stream is different than a bit depth of the input video stream, and a rate reduction circuit coupled to the depth reduction circuit, configured to scale the plurality of video frames from the depth reduction circuit, in response to a desired bit rate for the output video stream, and an encoder coupled to the rate reduction circuit, configured to encode the plurality of video frames from the rate reduction circuit into the output video stream is also contemplated.
