US Patent 7145122 Imaging sensor using asymmetric transfer transistor

The present disclosure introduces a simple method for reducing the capacitance of the floating diffusion node of a CMOS image sensor and consequently improving the image sensor's sensitivity. While reducing parasitic capacitances such as the capacitance between the transfer gate and the floating node, the proposed device layouts, in which the channel width of the detection section is different from the channel width of the photoelectric conversion element, demand no more than what is required for the fabrication of the traditional layouts.