Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Nitin Vig0
Amab K. Mitra0
Date of Patent
December 19, 2006
Patent Application Number
11098106
Date Filed
April 4, 2005
Patent Primary Examiner
Patent abstract
A clock delay compensation circuit for an integrated circuit having a first voltage domain and a second voltage domain, has a first delay element that receives a clock signal and generates a first delayed clock signal, and a multiplexer that receives the clock signal and the first delayed clock signal and generates a variable clock signal. The first delayed clock signal is selected when the second voltage domain is at a higher voltage level than the first voltage domain.
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