Patent attributes
A programmable gain low noise amplifier includes a tail current transistor (Q3) having a source coupled to a first reference voltage (VDD) and a drain coupled to a tail current conductor (18) and, in a differential input embodiment, a plurality of pairs (Q4,5, Q7,8, Q10,11, Q13,14) of differentially coupled input transistors. Each pair includes a first input transistor having a gate coupled to a first input conductor (19A) and a drain coupled to a first output conductor (26A) and a second input transistor having a gate coupled to a second input conductor (19B), a source coupled to a source of the first transistor, and a drain coupled to a second output conductor (26B). The sources of the first and second input transistors of some or all of the pairs are selectively coupled to the tail current conductor (18) in it response to corresponding gain control signals (B1,2,3).
