US Patent 7154183 Semiconductor device having multilevel interconnection

A semiconductor device having a multilevel interconnection encompasses (a) a subject level interconnect, (b) a subject interlevel insulator disposed on the subject level interconnect, (c) a connecting via-plug buried in the subject interlevel insulator, the bottom surface of the connecting via-plug is in contact with the subject level interconnect, (d) a dummy via-plug buried in the subject interlevel insulator, the top surface of the dummy via-plug is electrically open, and (e) an upper level interconnect of the subject level interconnect, disposed at the top surface of the subject interlevel insulator, being contact with the top surface of the connecting via-plug.