US Patent 7154317 Latch circuit including a data retention latch

A latch circuit 2 is described including a function path latch 4, 6, which may be in the form of a standard flip-flop, together with a data retention latch 12, 14. The reset signal nreset and the scan enable signal SE are used to control these latches to perform reset, scan, save and restore functions. The save and restore functions serve to save a data value dv from the functional path latch 4, 6 into the data retention latch 12, 14 and restore this value such that the functional path latch can be powered down without a loss of data.