US Patent 7154785 Charge pump circuitry having adjustable current outputs

Methods and apparatus are provided. A memory device includes charge pump circuitry having a plurality of parallel charge pumps for supplying a programming voltage to an array of memory cells of the memory device. Each of the charge pumps is adapted to output a fraction of a total current output capacity of the charge pump circuitry, and each is adapted to be selectively enabled for adjusting current output from the charge pump circuitry to the memory array according to a number of the memory cells to be programmed.