US Patent 7161398 VCDL-based dual loop DLL having infinite phase shift function

Provided is a dual loop DLL for generating an internal clock signal synchronized with an external clock, which includes a reference DLL receiving a reference clock and generating a plurality of phase clock signals having a first phase difference, a coarse loop selecting one of the phase clock signals and generating first through third digital codes to allow the internal clock signal to have a phase difference smaller than a second phase difference with respect to the external clock, and a fine loop selecting two of the phase clock signals and synchronizing the internal clock signal with the external clock, in response to the first through third digital codes.