US Patent 7163883 Edge seal for a semiconductor device

An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interlevel dielectric near the periphery of the integrated circuit device. The dielectric wall is of a different material than the low-k interlevel dielectric.