Patent attributes
The present invention provides a semiconductor device that can shorten the initialization cycle of impedance matching of interface buffers and reduce as much as possible affects on other circuits at the time of fine control thereafter. The semiconductor device (1) includes interface buffers (18a to 18c) whose internal impedances are controlled by impedance control data and an impedance control circuit (35) that generates the impedance control data. The impedance control circuit includes a first impedance control mode that initially generates the impedance control data by a binary search and comparison operation resulting from predetermined impedance control steps and sets the impedance control data in the interface buffers, and a second impedance control mode that updates the impedance control data set in the interface buffers by a sequential comparison operation resulting from the predetermined impedance control steps.
