US Patent 7164324 CMOS single-ended frequency doubler

A CMOS single-ended frequency doubler with improved subharmonic rejection and low phase noise which allows a single ended reference signal to be utilized in a Balanced Colpitts oscillator. The input is reproduced with a 180-degree phase shift for the opposite Colpitts transistor. This is achieved by adding two PMOS transistors. One transistor is placed as a follower, which reproduces any voltage shift applied to its gate to its source. Another transistor is a matching transistor for balance. By applying the single-ended signal to the gate of the follower transistor, it is reproduced at the source. The rest of the circuit takes advantage of the summing of two period currents with a 180-degree phase shift. The present invention achieves superior performance for frequency doubling due to the squaring of the gate voltage in the corresponding drain current. As a result, the double frequency component is further enhanced.