US Patent 7173864 Data latch circuit and semiconductor device using the same

There is provided a data latch circuit that comprises a first buffer for buffering an input data signal in synchronization with an input strobe signal, a first latch unit for conducting a switching operation in response to the strobe signal and latching an output signal from the first buffer for a preset time, a second buffer for buffering an output signal from the first latch unit in synchronization with the strobe signal, and a second latch unit for performing a switching operation in response to the strobe signal and latching an output signal from the second buffer. Further, the present invention provides a semiconductor device using the data latch circuit.