US Patent 7175951 Two mask in-situ overlay checking method
Patent 7175951 was granted and assigned to Taiwan Semiconductor Manufacturing Company on February, 2007 by the United States Patent and Trademark Office.
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Patent abstract
A method for in-situ overlay accuracy checking using a first mask having a first pattern and a second mask having a second pattern to expose a layer of photosensitive material formed on a wafer. The first pattern and the second pattern are exposed in the layer of photosensitive material using the first mask, the second mask, and a photolithographic alignment and exposure system. The layer of photosensitive material is then developed and the relative position between the first pattern and the second pattern is analyzed.
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US Patent 07175951 Two mask in-situ overlay checking method US Patent 7175951 Two mask in-situ overlay checking method
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Patent Number
0717595100
Patent Number
717595100
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Official Website
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
071759510
Date of Patent
February 13, 2007
0Patent Application Number
101263880
Date Filed
April 19, 2002
0Official Website
Patent Primary Examiner
Edits on 26 Sep, 2022
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
071759510
Date of Patent
February 13, 2007
0Patent Application Number
101263880
Date Filed
April 19, 2002
0Official Website
Patent Primary Examiner
Edits on 8 Jun, 2022
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US Patent 07175951 Two mask in-situ overlay checking method
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07175951
Date of patent
February 13, 2007
Patent application number
10126388
Date Filed
April 19, 2002
Patent primary examiner
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