US Patent 7180115 DRAM cell structure with tunnel barrier
Patent 7180115 was granted and assigned to Infineon Technologies on February, 2007 by the United States Patent and Trademark Office.
Is a
Current Assignee
Date Filed
November 14, 2000
Date of Patent
February 20, 2007
Patent Application Number
10130441
Patent Citations Received
Patent Jurisdiction
Patent Number
Patent Primary Examiner
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