US Patent 7180170 Lead-free integrated circuit package structure
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Patent abstract
An integrated circuit package (60) has a substrate (12) with a first surface (51) for mounting a semiconductor die (20) and a second surface (52) defining a via (70). A lead (26) is formed by plating a conductive material to project outwardly from the second surface. The conductive material extends from the lead through the first via for coupling to the semiconductor die.
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US Patent 07180170 Lead-free integrated circuit package structure US Patent 7180170 Lead-free integrated circuit package structure
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Patent Number
0718017000
Patent Number
718017000
Edits on 22 May, 2023
Golden AI
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Official Website
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Infobox
Is a
Patent Jurisdiction
Patent Number
071801700
Date of Patent
February 20, 2007
0Patent Application Number
110403340
Date Filed
January 24, 2005
0Official Website
Patent Primary Examiner
Edits on 23 Sep, 2022
Golden AI
Infobox
Is a
Patent Jurisdiction
Patent Number
071801700
Date of Patent
February 20, 2007
0Patent Application Number
110403340
Date Filed
January 24, 2005
0Official Website
Patent Primary Examiner
Edits on 8 Jun, 2022
Golden AI
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Edits on 20 Nov, 2021
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US Patent 07180170 Lead-free integrated circuit package structure
Infobox
Is a
Patent jurisdiction
Patent number
07180170
Date of patent
February 20, 2007
Patent application number
11040334
Date Filed
January 24, 2005
Patent primary examiner
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