US Patent 7183863 Self-initializing frequency detector

A phase-locked loop (PLL) locks onto an input signal to provide an output signal that is proportional in frequency to the input signal. The PLL also detects whether an input signal's frequency falls outside a predetermined range and, whenever the input signal's frequency falls outside of range, the PLL provides a stable output signal at a predetermined frequency. While the PLL is providing a stable output signal in this manner it also monitors the input signal to determine whether the input signal's frequency has returned to within a re-qualification frequency range. If the input signal's frequency does fall within the re-qualification range, the PLL proceeds to lock onto the input signal.