Patent attributes
The present invention provides a semiconductor device embracing (a) a first semiconductor region defined by a first end surface, a second end surface opposing to the first end surface and a side boundary surface connecting the first and second end surfaces; (b) a second semiconductor region connected with the first semiconductor region at the second end surface; (c) a third semiconductor region connected with the first semiconductor region at the first end surface; and (d) a fourth semiconductor region having inner surface in contact with the side boundary surface and an impurity concentration lower than the first semiconductor region. The fourth semiconductor region surrounds the first semiconductor region, and is disposed between the second and third semiconductor regions. The first, second and fourth semiconductor regions are first conductivity-type, but the third semiconductor region is a second conductivity type.
