Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Keith Edward Buchanan0
Joon-Chai Yeoh0
Date of Patent
April 3, 2007
0Patent Application Number
104841680
Date Filed
July 15, 2002
0Patent Primary Examiner
Patent abstract
This invention relates to a semiconductor structure for dual damascene processing and includes upper and lower low k dielectric layers formed in a stack when the upper surface of the lower layer has an integral etch stop layer formed by exposing the upper surfaces of the layer H2 plasma without any prior anneal prior to the deposition of the upper layer.
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