Patent attributes
A laminated ceramic capacitor C has a plurality of internal electrodes embedded in a dielectric base substance in a stratified manner, the internal electrodes are caused to conduct to a pair of terminal electrodes provided on an outer surface of the dielectric base substance, and the terminal electrode has an outermost layer containing Sn as a main component. There is provided a step of setting the laminated ceramic capacitor in a temperature environment which is not less than 125° C. and not more than 180° C. and applying a direct-current voltage between the terminal electrodes in order to measure a direct-current insulation resistance. The step of applying the direct-current voltage includes a first step and a second step. A direct-current voltage V1 (V/μm) which falls within a range of 20 to 40 (V/μm) is applied at the first step, and a direct-current voltage V2 (V) with a rated voltage being taken into consideration is applied at the second step after termination of the first step.
