US Patent 7205791 Bypass-able carry chain in a programmable logic device

A carry chain in a logic array block includes a first path connecting a first series of logic elements in the logic array block, where the logic elements in the first series is a subset of the set of logic elements in the logic array block. The carry chain also includes a second path connecting a second series of logic elements in the logic array block, where one or more of the logic elements in the second series are not in the first series.