US Patent 7206244 Temperature based DRAM refresh

A system for controlling the refresh cycles of a DRAM cell array based upon a temperature measurement. During active mode, a refresh request indication based on a measured temperature is provided to a DRAM controller (e.g. of another integrated circuit die), wherein the DRAM controller initiates a refresh cycle of the DRAM cell array in response thereto. In a self refreshing mode, the DRAM controller does not initiate refresh cycles, but refresh cycles are performed by a controller on the integrated circuit die of the array based upon a temperature measurement.