Patent attributes
A circuit and method are provided for performing built-in test of output signal magnitudes of integrated differential signal generator circuitry. In accordance with one embodiment, first upper and lower reference voltages and second upper and lower reference voltages are received via a plurality of reference electrodes, wherein: a difference between the first and upper and lower reference voltages comprises a first difference magnitude; a difference between the second upper and lower reference voltages comprises a second difference magnitude; and the first difference magnitude is greater than the second difference magnitude. Test signal generator circuitry provides a plurality of binary signals with respective successions of opposing signal states. Differential signal generator circuitry, coupled to the test signal generator circuitry and responsive to the plurality of binary signals, provides a plurality of differential signals having respective magnitudes related to the respective successions of opposing binary signal states. Signal comparison circuitry, coupled to the plurality of reference electrodes and the differential signal generator circuitry, and responsive to the first and second upper and lower reference signals and the plurality of differential signals, provides a plurality of test signals with respective test signal states indicative of whether respective ones of the differential signal magnitudes are within a range defined as being less than the first difference magnitude and greater than the second difference magnitude.
