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US Patent 7214568 Semiconductor device configured for reducing post-fabrication damage

Patent 7214568 was granted and assigned to Agere Systems on May, 2007 by the United States Patent and Trademark Office.

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Patent
Patent
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Patent attributes

Current Assignee
Agere Systems
Agere Systems
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
72145680
Patent Inventor Names
Joseph Michael Freund0
Sujal Dipak Shah0
John M. Brennan0
Richard Handly Shanaman, III0
Date of Patent
May 8, 2007
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Patent Application Number
107736140
Date Filed
February 6, 2004
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Patent Citations Received
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US Patent 11887858 Semiconductor device and method of manufacturing same
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Patent Primary Examiner
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Brook Kebede
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Patent abstract

A semiconductor device includes an IC die configured to reduce post-fabrication damage to the device. The IC die is formed such that at least a portion of one or more perimeter edges of the die are beveled by an etching process. The semiconductor device may include a plurality of IC dies, at least one of the IC dies being separated from the semiconductor device by forming one or more v-shaped grooves in an upper surface of the device, the v-shaped grooves defining perimeter edges of the at least one IC die. A back surface of the semiconductor device is removed until at least a portion of the v-shaped grooves are exposed. When the IC die is separated from the semiconductor device in this manner, a sidewall of each of the v-shaped grooves forms a beveled perimeter edge of the separated IC die.

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