Patent attributes
A pseudo-random binary sequence checker having automatic synchronization is disclosed. The pseudo-random binary sequence checker includes a receiver, a synchronizer, and a comparator. The receiver is capable of receiving a pseudo-random binary sequence, which is generated by a pseudo-random binary sequence generator, in a parallel fashion n bits at a time. The synchronizer automatically synchronizes the state of the receiver with an n-bit sample within the pseudo-random binary sequence and calculate all subsequent n-bit sample within the pseudo-random binary sequence. The comparator compares the subsequent calculated n-bit sample within the pseudo-random binary sequence to the next subsequent next received n-bit sample within the pseudo-random binary sequence to indicate an error condition has occurred if each calculated n-bit sample within the pseudo-random binary sequence does not equal to the corresponding received n-bit sample within the pseudo-random binary sequence.
