US Patent 7227216 Mono gate memory device and fabricating method thereof

A mono-gate memory device and fabricating method thereof are provided, which may reduce or solve over-erasing problems by implementing a mono split-gate SONOS type non-volatile memory cell, and which do not affect logic circuit characteristics by enabling logic circuit fabrication after completing the ONO structure. The present memory cell includes an ONO layer on the active area of the substrate, a gate oxide layer on the active area adjacent to the ONO layer, a gate on the gate oxide layer and on a portion of the ONO layer, a drain partially covered by the ONO layer, and a source partially covered by the gate oxide layer.