Patent attributes
In a vertically aligned mode LCD, a gate line and a storage line are formed on a substrate in parallel, and a storage electrode and a cover pattern are formed as branches of the storage line. The storage electrode is overlapped with an aperture of a common electrode formed on an upper substrate. The cover pattern is located between a pixel electrode and a data line to prevent a light leakage. Accordingly, an alignment error margin of the upper substrate and the lower substrate is increased, an aperture ratio is enhanced, and repairing the high pixel defect is possible. Further, the light leakage caused by a voltage of the data line is prevented.