US Patent 7233052 Semiconductor device including fine dummy patterns

A semiconductor device of this invention includes a first interconnect pattern formed on a semiconductor substrate and a second interconnect pattern formed above the first interconnect pattern with an interlayer insulating film sandwiched therebetween. The first interconnect pattern includes a dummy pattern insulated from the first interconnect pattern, and the dummy pattern includes a plurality of fine patterns adjacent to each other and air gaps formed between the adjacent fine patterns.