Patent attributes
A pulse generator comprises a CMOS inverter, a capacitive device and a resistive device, where the CMOS inverter has two terminals connected to a source voltage and a reference voltage, e.g., ground, respectively, the capacitor device and the resistive device are connected to the input end of CMOS inverter, and pulses are generated at the output end of the CMOS inverter. The capacitive device is charged by a boost signal and discharged through the resistive device, so as to manipulate a potential at the input end of the CMOS inverter to control the operations of the transistors included in the CMOS inverter, thereby changing the level of the output voltage of the CMOS inverter. The widths of the pulses can be adjustable by a control signal received by the resistive device.
