US Patent 7239540 Semiconductor memory device

A semiconductor memory device having a crosspoint-type memory cell array includes a column readout voltage supply circuit 12 which supplies a predetermined first voltage when readout is selected, and supplies a second voltage different from the first voltage when the readout is not selected, to each of column selection lines BL, a row readout voltage supply circuit 11 which supplies the second voltage to each of row selection lines DL at the time of readout, a sense circuit 15 which senses a current flowing in the selected row selection line DL separately from a current flowing in the unselected row selection lines DL and senses an electric resistance state of the selected memory cell at the time of readout, and a row voltage displacement prevention circuit 31 which prevents a displacement in a supplied voltage level in at least selected row selection line DL at the time of readout.