US Patent 7239550 Method of programming a non-volatile memory cell

The present invention relates to a method of a programming a select non-volatile memory cell in a plurality of serially connected non-volatile memory cells with a serially connected select transistor. Each of the non-volatile memory cells has a control gate for receiving a programming voltage and the select transistor has a select gate for receiving a select voltage. The method comprises applying the programming voltage to the control gate of the select non-volatile memory cell in a program command sequence. The magnitude of the select voltage to the select gate of the select transistor within the program command sequence is then varied. The method can be applied to non-volatile cells in a NAND or NOR architecture.