US Patent 7242467 Method and apparatus for high-resolution defect location and classification

In the manufacture of integrated circuits on a wafer, it is necessary to monitor the manufacturing process by inspecting the ICs as to whether errors or defects have occurred during production. It is already known to use a scattered-light device (32) to determine whether a defect is present on the wafer. According to the present invention, defect examination is now improved in that defect-suspected regions (33) are identified using the scattered-light device (32). With a further examination system (30, 28) different from the scattered-light device (32), a determination is then made as to whether the defect-suspected regions (33) are defects. The latter can then also be classified.