Patent attributes
A power amplifier with a multi-mode digital bias control circuit is provided. The power amplifier utilizes a complementary reference voltage generation circuit and a bias current-control circuit to generate a plurality of bias current levels for different output power levels. In an embodiment of the present invention, the power amplifier circuit is connected to a reference voltage and two control signals. Depending on the desired output power level, the control signals set the corresponding bias current in the amplifying transistors, to ensure sufficient linearity. The power amplifier is capable of operating at a very low quiescent current level, for example, 5 mA. As a result, a significant improvement in the power amplifier's overall efficiency is achieved, and the battery talk time of a wireless communication device is increased. The invention finds application in wireless communication devices such as CDMA, WCDMA, EDGE and WLAN mobile devices.
