Patent attributes
A semiconductor device, for example a MOSFET or IGBT, includes a region (30, 36, 50) in the drain drift region (14) juxtaposed with its channel-accommodating region (15) and spaced from the drain contact region (14a) by means of an intermediate portion of the drift region. The region comprises alternating stripes (31, 32) of the first and second conductivity types, which stripes extend alongside the channel-accommodating region (15). In a trench gated device the stripes are elongated in a direction perpendicular to the trench walls. In a planar gate device the stripes extend around the periphery of the channel-accommodating region (15) leaving the region near the gate in a direction perpendicular with respect to the gate electrotes. The dimensions and doping levels of the stripes (31, 32) are selected such that region (30, 36, 50) provides a voltage-sustaining space-charge zone when depleted. The invention enables reduction of lateral current spreading resistance in the drain drift region (14) without significantly degrading the breakdown properties of the device.
