Patent attributes
A semiconductor storage device includes: a plurality of memory array cells (hereinafter, referred to as cells); a circuit arranged in each of the cells for precharge of each bit line of the cells to a predetermined voltage; and a circuit for comparing, for each bit line, an output voltage of each bit line of the cells selected for reading out data to an output voltage of each bit line of cells selected for reference. When the data is read out, the voltage value for precharge of the bit line of the cells selected for reading out data and the voltage value for precharge of the bit line of the cells selected for reference are temporarily set to different values. Thus, all the output bits of the cells selected for reading out data can be read out by a single read out operation.
