US Patent 7268385 Semiconductor memory device

A semiconductor memory device comprises diffusion regions, a floating gate, a third diffusion region, a selection gate electrode, and a control gate electrode that three-dimensionally crosses the selection gate electrode and extends in a direction orthogonal to the selection gate electrode are included. A channel formed immediately below the selection gate and which constitutes a passage connecting the two diffusion regions has a shape in a top view, including a first path extending in one direction, from one diffusion region, and a second path extending from the end of the first path to the other diffusion region in a direction orthogonal to a first direction.