Patent 7269690 was granted and assigned to Hitachi on September, 2007 by the United States Patent and Trademark Office.
A data processing method for a disk array device capable of achieving a duplex system of data and improving performance of the same device while a quantity of processing for writing into a cache memory (through a switch) is reduced. In the disk array device, a host interface portion comprises a nonvolatile memory portion for saving data written from a host computer/server, and a data transfer control portion for transferring write data from the host computer/server to the nonvolatile memory portion and a global cache memory portion. If a write request is received from the host computer/server, a data transfer control portion transfers the write data from the host computer/server to the nonvolatile memory portion and to the global cache memory portion through a switch portion.