US Patent 7269708 Memory controller for non-homogenous memory system

A memory controller includes a first memory interface adapted to be coupled to one or more first memory devices of a first memory type having a first set of attributes, and a second memory interface adapted to be coupled to one or more second memory devices of a second memory type having a second set of attributes. The first and second sets of attributes have at least one differing attribute. The controller also includes interface logic configured to direct memory transactions having a predefined first characteristic to the first memory interface and to direct memory transactions having a predefined second characteristic to the second memory interface. Pages having a usage characteristic of large volumes of write operations may be mapped to the one or more first memory devices, while pages having a read-only or read-mostly usage characteristic may be mapped to the one or more second memory devices.