US Patent 7271060 Semiconductor processing methods

The invention includes methods in which common processing steps are utilized during fabrication of components of a memory array region of a semiconductor substrate and components of a peripheral region proximate the memory array region, and yet the components of the peripheral region are built for different performance characteristics than the components of the memory array region. The methods can include laterally recessing nitride-containing masking structures associated with the peripheral region to a greater extent than nitride-containing masking structures associated with the memory array region, followed by thermal oxidation of the substrate to form dielectric material adjacent the masking structures.