Patent attributes
The invention provides a receiver for use in a wireless communication system that substantially reduces mismatch between an in-phase (I) component and a quadrature (Q) component of a received signal. The receiver achieves this by sharing or “ping-ponging” an analog-to-digital converter (ADC) between the I and Q components. By sharing a single pipelined ADC between the I and Q components, both the I and Q components are processed by the same circuitry inside the pipelined ADC thereby eliminating many dominant sources of I-Q mismatch. The pipelined ADC operates at approximately twice the speed as other circuit components. Consequently, I-Q mismatch, which negatively affects performance, may be substantially reduced. At the same time, system complexity, cost, and power dissipation are reduced by eliminating an additional ADC typically used to process the I and Q components in parallel signal paths.
