The multilayer system of this invention is characterized by the process when a first master such as a CPU to which a clock signal is constantly supplied from a clock generator activates a second master. First, the first master outputs an activation signal for activating the second master to the second master through a slave corresponding to the second master. The second master is activated by the activation signal and outputs to the clock generator a clock request signal for requesting supply of a clock signal to the second master. The clock generator supplies a clock signal to the second master in response to the clock request signal.