US Patent 7282946 Delay-insensitive data transfer circuit using current-mode multiple-valued logic

Patent 7282946 was granted and assigned to Gwangju Institute of Science and Technology on October, 2007 by the United States Patent and Trademark Office.

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Patent

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Current Assignee

Gwangju Institute of Science and Technology

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

7282946

Date of Patent

October 16, 2007

Patent Application Number

11025458

Date Filed

December 29, 2004

Patent Primary Examiner

‌

Linh V. Nguyen

Patent abstract

The present invention relates to a delay-insensitive DI data transfer circuit based on a current-mode multiple-valued logic for transferring data regardless of a delay time of transmission according to a length of wire.

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